
JEDEC JESD22-B116A
WIRE BOND SHEAR TEST
standard by JEDEC Solid State Technology Association, 08/01/2009
WIRE BOND SHEAR TEST
standard by JEDEC Solid State Technology Association, 08/01/2009
ADDENDUM No. 3 to JESD12 – CMOS GATE ARRAY MACROCELL STANDARD
Amendment by JEDEC Solid State Technology Association, 06/01/1986
CYCLED TEMPERATURE HUMIDITY BIAS LIFE TEST
standard by JEDEC Solid State Technology Association, 10/01/2007
HIGHLY ACCELERATED TEMPERATURE AND HUMIDITY STRESS TEST (HAST)
standard by JEDEC Solid State Technology Association, 01/01/2009
FOUNDRY PROCESS QUALIFICATION GUIDELINES – BACKEND OF LINE (Wafer Fabrication Manufacturing Sites)
standard by JEDEC Solid State Technology Association, 09/01/2018
HIGH BANDWIDTH MEMORY (HBM) DRAM
standard by JEDEC Solid State Technology Association, 10/01/2013
ACCELERATED MOISTURE RESISTANCE – UNBIASED AUTOCLAVE
standard by JEDEC Solid State Technology Association, 07/01/2015
STANDARD DESCRIPTION OF LOW-VOLTAGE TTL-COMPATIBLE, 5 V TOLERANT CMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 06/01/1996