JEDEC JESD209-4A
Low Power Double Data Rate 4 (LPDDR4)
standard by JEDEC Solid State Technology Association, 2015
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JEDEC JESD216B
SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)
standard by JEDEC Solid State Technology Association, 05/01/2014
JEDEC JESD79-3-1A
Addendum No. 1 to JESD79-3 – 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600
Amendment by JEDEC Solid State Technology Association, 01/01/2013
JEDEC JESD 24-2 (R2002)
ADDENDUM No. 2 to JESD24 – GATE CHARGE TEST METHOD
Amendment by JEDEC Solid State Technology Association, 01/01/1991
JEDEC JEP156
CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION
standard by JEDEC Solid State Technology Association, 03/01/2009
JEDEC JESD82-16A
DEFINITION OF THE SSTUA32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY TEST FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
JEDEC JESD241
Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
standard by JEDEC Solid State Technology Association, 12/01/2015
JEDEC JESD76-2
STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (NORMAL RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001
JEDEC JESD84-B50.1
Embedded Multi-media card (e*MMC), Electrical Standard (5.01)
standard by JEDEC Solid State Technology Association, 07/01/2014
JEDEC JESD8-12A.01
1.2 V +/- 0.1 V (NORMAL RANGE) AND 0.8 – 1.3 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2007