JEDEC JESD82-16A
DEFINITION OF THE SSTUA32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY TEST FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
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JEDEC JESD241
Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
standard by JEDEC Solid State Technology Association, 12/01/2015
JEDEC JESD76-2
STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (NORMAL RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001
JEDEC JESD84-B50.1
Embedded Multi-media card (e*MMC), Electrical Standard (5.01)
standard by JEDEC Solid State Technology Association, 07/01/2014
JEDEC JESD8-12A.01
1.2 V +/- 0.1 V (NORMAL RANGE) AND 0.8 – 1.3 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2007
JEDEC JP001.01
FOUNDRY PROCESS QUALIFICATION GUIDELINES (Wafer Fabrication Manufacturing Sites)
standard by JEDEC Solid State Technology Association, 05/01/2004
JEDEC JEP147
PROCEDURE FOR MEASURING INPUT CAPACITANCE USING A VECTOR NETWORK ANALYZER (VNA)
standard by JEDEC Solid State Technology Association, 10/01/2003
JEDEC JESD223
Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 08/01/2011
JEDEC JEB 19
RECOMMENDED CHARACTERIZATION OF MOS SHIFT REGISTERS
standard by JEDEC Solid State Technology Association, 11/01/1972
JEDEC JESD221
Alpha Radiation Measurement in Electronic Materials
standard by JEDEC Solid State Technology Association, 05/01/2011