JEDEC JEP147
PROCEDURE FOR MEASURING INPUT CAPACITANCE USING A VECTOR NETWORK ANALYZER (VNA)
standard by JEDEC Solid State Technology Association, 10/01/2003
PROCEDURE FOR MEASURING INPUT CAPACITANCE USING A VECTOR NETWORK ANALYZER (VNA)
standard by JEDEC Solid State Technology Association, 10/01/2003
EMBEDDED MULTIMEDIACARD (e*MMC) e*MMC/CARD PRODUCT STANDARD, HIGH CAPACITY, INCLUDING RELIABLE WRITE, BOOT, AND SLEEP MODES (MMCA, 4.3)
standard by JEDEC Solid State Technology Association, 12/01/2007
STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES
standard by JEDEC Solid State Technology Association, 09/01/1990
PROCESS FAILURE MODE AND EFFECTS ANALYSIS (FMEA)
standard by JEDEC Solid State Technology Association, 05/01/2005
ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST
standard by JEDEC Solid State Technology Association, 03/01/2009
STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/2017
DELPHI COMPACT THERMAL MODEL GUIDELINE
standard by JEDEC Solid State Technology Association, 10/01/2008
DEFINITION OF 'CU878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 09/01/2004
Descriptive Designation System for Semiconductor-device Packages
standard by JEDEC Solid State Technology Association, 04/01/2013
STANDARD FOR DEFINITION OF CUA845 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 01/01/2007