JEDEC JESD 12-1B
ADDENDUM No. 1 to JESD12 – TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS
Amendment by JEDEC Solid State Technology Association, 08/01/1993
ADDENDUM No. 1 to JESD12 – TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS
Amendment by JEDEC Solid State Technology Association, 08/01/1993
ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST
standard by JEDEC Solid State Technology Association, 10/01/2011
EMBEDDED MULTIMEDIACARD (e*MMC)MECHANICAL STANDARD
standard by JEDEC Solid State Technology Association, 12/01/2007
DEFINITION OF the SSTUB32865 28-bit 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING
standard by JEDEC Solid State Technology Association, 12/01/2009
DDR4 DATA BUFFER DEFINITION (DDR4DB01)
standard by JEDEC Solid State Technology Association,
, Test Procedure for the Measurement of Terrestrial Cosmic Ray Induced Destructive Effects in Power Semiconductor Devices
standard by JEDEC Solid State Technology Association, 12/01/2015
JOINT IPC/JEDEC STANDARD FOR HANDLING, PACKING, SHIPPING AND USE OF MOISTURE/REFLOW SENSITIVE SURFACE-MOUNT DEVICES
standard by JEDEC Solid State Technology Association, 01/01/2007
IPC/JEDEC-9703: Mechanical Shock Test Guidelines for Solder Joint Reliability
standard by JEDEC Solid State Technology Association, 03/01/2009
Universal Flash Storage Host Controller Interface (UFSHCI)
standard by JEDEC Solid State Technology Association, 09/01/2013