JEDEC JESD91-A (R2011)
METHOD FOR DEVELOPING ACCELERATION MODELS FOR ELECTRONIC COMPONENT FAILURE MECHANISMS
standard by JEDEC Solid State Technology Association, 08/01/2003
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JEDEC JESD 82-12A
DEFINITION OF THE SSTU32S869 & SSTU32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 04/01/2007
JEDEC JEP162
System Level ESD: Part II: Implementation of Effective ESD Robust Designs
standard by JEDEC Solid State Technology Association, 01/01/2013
JEDEC JESD 8-9B
ADDENDUM No. 9B to JESD8 – STUB SERIES TERMINATED LOGIC FOR 2.5 VOLTS (SSTL_2): Includes Errata and Corrected Page 7 as of October 18, 2002
standard by JEDEC Solid State Technology Association, 05/01/2002
JEDEC JESD230D
NAND Flash Interface Interopability
standard by JEDEC Solid State Technology Association, 06/01/2019
JEDEC JESD75-1
BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16, 18, AND 20-BIT LOGIC FUNCTIONS USING A 54 BALL PACKAGE
standard by JEDEC Solid State Technology Association, 10/01/2001
JEDEC JESD82-1A
DEFINITION OF CVF857 PLL CLOCK DRIVER FOR REGISTERED PC1600, PC2100, PC2700, AND PC3200 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2004
JEDEC JESD230
NAND Flash Interface Interoperability
standard by JEDEC Solid State Technology Association, 10/01/2012
JEDEC JESD220D
Universal Flash Storage (UFS)
standard by JEDEC Solid State Technology Association, 01/01/2018
JEDEC JESD531 (R2002)
THERMAL RESISTANCE TEST METHOD FOR SIGNAL AND REGULATOR DIODES (FORWARD VOLTAGE, SWITCHING METHOD)
standard by JEDEC Solid State Technology Association, 07/01/1986