JEDEC JESD224
Universal Flash Storage (UFS) Test
standard by JEDEC Solid State Technology Association, 03/01/2013
Universal Flash Storage (UFS) Test
standard by JEDEC Solid State Technology Association, 03/01/2013
FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTS
standard by JEDEC Solid State Technology Association, 10/01/2013
METHOD FOR DEVELOPING ACCELERATION MODELS FOR ELECTRONIC COMPONENT FAILURE MECHANISMS
standard by JEDEC Solid State Technology Association, 08/01/2003
DEFINITION OF THE SSTU32S869 & SSTU32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 04/01/2007
System Level ESD: Part II: Implementation of Effective ESD Robust Designs
standard by JEDEC Solid State Technology Association, 01/01/2013
ADDENDUM No. 9B to JESD8 – STUB SERIES TERMINATED LOGIC FOR 2.5 VOLTS (SSTL_2): Includes Errata and Corrected Page 7 as of October 18, 2002
standard by JEDEC Solid State Technology Association, 05/01/2002
NAND Flash Interface Interopability
standard by JEDEC Solid State Technology Association, 06/01/2019
BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16, 18, AND 20-BIT LOGIC FUNCTIONS USING A 54 BALL PACKAGE
standard by JEDEC Solid State Technology Association, 10/01/2001
DEFINITION OF CVF857 PLL CLOCK DRIVER FOR REGISTERED PC1600, PC2100, PC2700, AND PC3200 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2004
NAND Flash Interface Interoperability
standard by JEDEC Solid State Technology Association, 10/01/2012