JEDEC JESD 12-5
ADDENDUM No. 5 to JESD12 – DESIGN FOR TESTABILITY GUIDELINES
Amendment by JEDEC Solid State Technology Association, 08/01/1988
ADDENDUM No. 5 to JESD12 – DESIGN FOR TESTABILITY GUIDELINES
Amendment by JEDEC Solid State Technology Association, 08/01/1988
ADDENDUM No. 10 to JESD24 – TEST METHOD FOR MEASUREMENT OF REVERSE RECOVERY TIME trr FOR POWER MOSFET DRAIN-SOURCE DIODES
Amendment by JEDEC Solid State Technology Association, 08/01/1994
Notification Standard for Product Discontinuance
standard by JEDEC Solid State Technology Association, 11/01/2014
COMPACT THERMAL MODEL OVERVIEW
standard by JEDEC Solid State Technology Association, 10/01/2008
GUIDE FOR THE PRODUCTION AND ACQUISITION OF RADIATION-HARDNESS ASSURED MULTICHIP MODULES AND HYBRID MICROCIRCUITS
standard by JEDEC Solid State Technology Association, 01/01/2010
LOW POWER DOUBLE DATA RATE 2 (LPDDR2)
standard by JEDEC Solid State Technology Association, 12/01/2010
CMOS SEMICUSTOM DESIGN GUIDELINES
standard by JEDEC Solid State Technology Association, 11/01/1991
DDR3 SDRAM STANDARD
standard by JEDEC Solid State Technology Association, 07/01/2010
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2011
METHODS OF MEASUREMENT FOR SEMICONDUCTOR LOGIC GATING MICROCIRCUITS
standard by JEDEC Solid State Technology Association, 01/01/1970