ADDENDUM No. 11A.01 to JESD8 – 1.5 V +/- 0.1 V (NORMAL RANGE) AND 0.9 – 1.6 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2007
A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESS
standard by JEDEC Solid State Technology Association, 12/01/2001
EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NON VOLATILE MEMORY DEVICES, VERSION 1.0
standard by JEDEC Solid State Technology Association, 08/01/2018
UNIVERSAL FLASH STORAGE (UFS) CARD EXTENSION
standard by JEDEC Solid State Technology Association, 03/01/2016
DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 07/01/2000
SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)
standard by JEDEC Solid State Technology Association, 06/01/1985
LOW FREQUENCY POWER TRANSISTORS
standard by JEDEC Solid State Technology Association, 01/01/1976
SOLID STATE PRODUCTS REGISTRATION LIST(ORDER FROM TYPE ADMINISTRATION OFFICE)
standard by JEDEC Solid State Technology Association, 09/01/1986
