JEDEC JESD8-31
1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE
standard by JEDEC Solid State Technology Association, 03/01/2018
1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE
standard by JEDEC Solid State Technology Association, 03/01/2018
QUALITY SYSTEM ASSESSMENT
standard by JEDEC Solid State Technology Association, 10/01/2013
AIR-CONVECTION-COOLED, LIFE TEST ENVIRONMENT FOR LEAD-MOUNTED SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 03/01/1966
STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2017
HIgh Bandwidth Memory DRAM (HBM1, HBM2)
standard by JEDEC Solid State Technology Association, 11/01/2018
STANDARD METHOD FOR CALCULATING THE ELECTROMIGRATION MODEL PARAMETERS FOR CURRENT DENSITY AND TEMPERATURE
standard by JEDEC Solid State Technology Association, 02/01/1998
SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD
standard by JEDEC Solid State Technology Association, 03/01/2016
PHYSICAL DIMENSION
standard by JEDEC Solid State Technology Association, 06/01/2003
DEFINITION OF THE SSTVN16859 2.5-2.6 V 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR PC1600, PC2100, PC2700 AND PC3200 DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2005