JEDEC JESD75-4
BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 03/01/2004
BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 03/01/2004
Mechanical Shock – Component and Subassembly
standard by JEDEC Solid State Technology Association, 07/01/2013
STANDARD FOR DESCRIPTION OF A 3.3 V, 18-BIT, LVTTL I/O REGISTER FOR PC133 REGISTERED DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 07/01/2001
Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Quality Problems)
standard by JEDEC Solid State Technology Association, 07/01/2018
Material Composition Declaration for Electronic Products
standard by JEDEC Solid State Technology Association, 04/01/2009
INTERFACE TEST METHOD FOR THE MEASUREMENT OF THE THERMAL RESISTANCE JUNCTION-TO-CASE OF SEMICONDUCTOR DEVICES WITH HEAT FLOW TROUGH A SINGLE PATH
standard by JEDEC Solid State Technology Association, 11/01/2010
DESCRIPTIVE DESIGNATION SYSTEM FOR SEMICONDUCTOR-DEVICE PACKAGES
standard by JEDEC Solid State Technology Association, 08/01/2008
Implementation of the Electrical Test Method for the Measurement of Real Thermal Resistance and Impedance of Light-emitting Diodes with Exposed Cooling Surface
standard by JEDEC Solid State Technology Association, 04/18/2012
SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MANAGEMENT
standard by JEDEC Solid State Technology Association, 01/01/2018