JEDEC JESD 35-A
PROCEDURE FOR WAFER-LEVEL-TESTING OF THIN DIELECTRICS
standard by JEDEC Solid State Technology Association, 03/01/2010
PROCEDURE FOR WAFER-LEVEL-TESTING OF THIN DIELECTRICS
standard by JEDEC Solid State Technology Association, 03/01/2010
TEMPERATURE CYCLING
standard by JEDEC Solid State Technology Association, 10/01/2014
Embedded Multi-media card (e*MMC), Electrical Standard 5.0
standard by JEDEC Solid State Technology Association, 09/01/2013
INFORMATION REQUIREMENTS FOR THE QUALIFICATION OF SILICON DEVICES
standard by JEDEC Solid State Technology Association, 11/01/2017
SEMICONDUCTOR WAFER AND DIE BACKSIDE EXTERNAL VISUAL INSPECTION
standard by JEDEC Solid State Technology Association, 03/01/2011
ADDENDUM No. 6 to JESD24 – THERMAL IMPEDANCE MEASUREMENTS FOR INSULATED GATE BIPOLAR TRANSISTORS
Amendment by JEDEC Solid State Technology Association, 10/01/2001
DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
standard by JEDEC Solid State Technology Association, 12/01/2010
PRODUCT DISCONTINUANCE
standard by JEDEC Solid State Technology Association, 05/01/2005
Universal Flash Storage (UFS)
standard by JEDEC Solid State Technology Association, 02/01/2011
Low Power Double Data Rate 5 (LPDDR5)
standard by JEDEC Solid State Technology Association, 02/01/2019