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JEDEC JESD82-17

DEFINITION OF THE SSTUA32S868 AND SSTUA32D868 REGISTERED BUFFER WITH PARITY FOR 2R X 4 DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2005

JEDEC JESD73-3

STANDARD FOR DESCRIPTION OF 3867 – 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH
standard by JEDEC Solid State Technology Association, 11/01/2001

JEDEC JESD223A

Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 06/01/2012

JEDEC JESD8-4

ADDENDUM No. 4 to JESD8 – CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 11/01/1993

JEDEC JESD82-15

STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2005

JEDEC JESD51-11

TEST BOARDS FOR THROUGH-HOLE AREA ARRAY LEADED PACKAGE THERMAL MEASUREMENT
standard by JEDEC Solid State Technology Association, 06/01/2001

JEDEC JESD33-B

STANDARD METHOD FOR MEASURING AND USING THE TEMPERATURE COEFFICIENT OF RESISTANCE TO DETERMINE THE TEMPERATURE OF A METALLIZATION LINE
standard by JEDEC Solid State Technology Association, 02/01/2004