JEDEC JESD73-3
STANDARD FOR DESCRIPTION OF 3867 – 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH
standard by JEDEC Solid State Technology Association, 11/01/2001
STANDARD FOR DESCRIPTION OF 3867 – 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH
standard by JEDEC Solid State Technology Association, 11/01/2001
VIBRATION, VARIABLE FREQUENCY
standard by JEDEC Solid State Technology Association, 06/01/2002
Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 06/01/2012
HIGHLY ACCELERATED TEMPERATURE AND HUMIDITY STRESS TEST (HAST)
standard by JEDEC Solid State Technology Association, 07/01/2015
DDR2 SDRAM SPECIFICATION
standard by JEDEC Solid State Technology Association, 11/01/2009
STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2005
TEST BOARDS FOR THROUGH-HOLE AREA ARRAY LEADED PACKAGE THERMAL MEASUREMENT
standard by JEDEC Solid State Technology Association, 06/01/2001
ADDENDUM No. 4 to JESD8 – CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 11/01/1993
SILICON RECTIFIER DIODES
standard by JEDEC Solid State Technology Association, 11/01/2002
STANDARD METHOD FOR MEASURING AND USING THE TEMPERATURE COEFFICIENT OF RESISTANCE TO DETERMINE THE TEMPERATURE OF A METALLIZATION LINE
standard by JEDEC Solid State Technology Association, 02/01/2004