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JEDEC JESD47K

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/2018

JEDEC JESD8-6

ADDENDUM No. 6 to JESD8 – HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/1995

JEDEC JESD89A

MEASUREMENT AND REPORTING OF ALPHA PARTICLE AND TERRESTRIAL COSMIC RAY INDUCED SOFT ERRORS IN SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2006

JEDEC JESD77D

Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devices
standard by JEDEC Solid State Technology Association, 08/01/2012